1. Field of the Invention
This invention relates to a quality control system, a quality control method, and a method of lot-to-lot wafer processing, and more particularly to a quality control system, a quality control method, and a method of lot-to-lot wafer processing being applied to the technology of manufacturing semiconductor devices for providing lot quality control.
2. Background Art
Semiconductor devices are manufactured by numerous semiconductor manufacturing devices in a long, complicated series of numerous steps including lithography, etching, heat treatment (oxidation, annealing, and diffusion), ion implantation, thin film formation (CVD (Chemical Vapor Deposition), sputtering, and evaporation), cleaning (resist removal and solution cleaning), and inspection. In the inspection step, each lot is subjected to quality control by means of quality control measurement (hereinafter referred to as “QC measurement”) and the like. “QC measurement” is a technique for measuring the film thickness, line width, or the like of a resist pattern formed on a wafer in each lot. The quality (defective or non-defective) of a wafer or wafers and of an entire lot is determined using the measurement results (QC actual measurements) (see JP 7-244694A (1995), for example).
In QC measurement, a plurality of wafers in an intended lot are extracted (sampled) for QC measurement in order to reduce time and cost. In general, conventional sampling techniques follow the practice for previous-generation products. That is, previously specified wafers in a lot remain to be sampled.
However, the parameters of the semiconductor manufacturing devices may depend, for example, on the result of seasoning that is performed before or after the dry etching process. This causes within-lot variation due to the parameter fluctuation of the semiconductor manufacturing devices before and after seasoning. If particular wafers are extracted (sampled) for QC measurement without taking this within-lot variation into consideration and the sampled wafers are determined to be non-defective, then the lot itself is determined to be non-defective even though it actually had a fraction defective high enough to be rejected as out of specification. Thus, defective lots may be missed.